A bias circuit that can be used in a communication device that deals with signals whose spectrums are concentrated near a clock frequency, such as in the microwave communication, has been disclosure in the patent document 1. In the patent document 1, a technique is implemented that a short stub having a length of a quarter wave of a clock frequency is used to realize a high impedance near a signal spectral frequency to thereby decreasing impedance in a positive manner with respect to other frequencies including DC.
The patent document 2 discloses a technique for applying bias to a portion of high impedance, such as gate bias in a transistor. In the patent document 2, a resistor having sufficiently larger impedance than that in a transmission line is used to apply the bias.
In the approach of using the short stub of a quarter-wave length as disclosed in the patent document 1, however, a problem arises in that the stub can be used in an amplifying circuit that amplifies a signal whose spectrum is concentrated near a clock frequency, but can not be used in an amplifying circuit that amplifies a baseband signal that has a wide range of spectrum component.
The approach of using a resistor that has a substantially larger impedance than that in a transmission line as disclosed in the patent document 2 has a problem in that, for example, when applying bias voltage to a terminal necessary for current to be supplied such as a drain terminal, though the approach is rather easy to accommodate a tendency to growing broadband based on an original property of a resistor that fundamentally has a broadband property, it is necessary to apply bias voltage to which an amount of voltage drop in the resistor is added, thereby causing larger power source voltage.
To address these problems, there exists a bias circuit that has a property of high impedance with respect to a broadband signal and low impedance near DC (for example, the non-patent document 1 or the like). In such a bias circuit, an inductor is provided that blocks a broadband signal between bias power source and an object bias-applied.
Patent Document 1
Japanese Patent Application Laid-open No. 2000-196379
Patent Document 2
Japanese Patent Application Laid-open No. H3-216003
Non-Patent Document 1
Anritsu Electronic Meter General Catalog (CD-ROM version) 2003, pp. 520
In the approach of blocking an alternating current (AC) signal by use of the inductor, it is necessary to use an inductor that has high inductance component, keeps an inductive property at a high frequency region, and has a good frequency property.
In the approach disclosed in the non-patent document 1, however, there exists a problem that, when mounting an inductor, even a slight amount of parasitic capacitance between a mounting pattern and a ground potential causes serial resonance, and the impedance of the bias circuit at the resonance frequency of the serial resonance becomes very low, so that the desired characteristic can not be achieved.
The problem is caused by a partial omission of a signal or a reduction in a signal level produced due to the fact that, when the serial resonance occurs, a frequency component of the broadband signal passing an input terminal near the resonance frequency flows, instead of flowing toward an output terminal, toward the bias circuit with low impedance.
Note that because information of a baseband signal is added to a value of current or voltage at a specific timing of a time axis, even a little amount of deleted specific frequency component or reduced signal level with respect to electric power of a signal in total translates to an increased error rate resulting from a degraded time wave.
In view of these circumstances, it is an object of the present invention to provide a bias circuit in which a baseband signal is prevented from being partially omitted, which results from resonance, and signal characteristic degradation is controlled.